High quality 40GBASE-LR4 and OTU3 QSFP+ transceiver SMF 1310nm 10km 4X10 CWDM channel in 1310 band up to 11.2Gbps per channel

High quality 40GBASE-LR4 and OTU3 QSFP+ transceiver SMF 1310nm 10km 4X10 CWDM channel in 1310 band up to 11.2Gbps per channel

QSFP+ LR440Gb/s QSFP+ LR4 Optical TransceiverFeatures ● Compliant with 40G Ethernet IEEE802.3ba and 40GBASE-LR4 Standard ● QSFP+ MSA compliant ● Compliant with QDR/DDR Infiniband data rates ●

Product Details

QSFP+ LR4
40Gb/s QSFP+ LR4 Optical Transceiver


Features
●  Compliant with 40G Ethernet IEEE802.3ba and 40GBASE-LR4 Standard
●  QSFP+ MSA compliant
●  Compliant with QDR/DDR Infiniband data rates
●  Up to 11.2Gb/s data rate per wavelength
●  4 CWDM lanes MUX/DEMUX design
●  Up to 10km  transmission on single mode fiber (SMF)
●  Operating case temperature: 0~70°C
●  Maximum power consumption 3.5W
●  LC duplex connector
●  RoHS compliant


Applications
●  40GBASE-LR4 Ethernet Links
●  Infiniband QDR and DDR interconnects
●  Client-side 40G Telecom connections


General Description
This product is a transceiver module designed for 2m-10km optical communication applications. The design is compliant to 40GBASE-LR4 of the IEEE P802.3ba standard. The module converts 4 inputs channels (ch) of 10Gb/s electrical data to 4 CWDM optical signals, and multiplexes them into a single channel for 40Gb/s optical transmission. Reversely, on the receiver side, the module optically de-multiplexes a 40Gb/s input into 4 CWDM channels signals, and converts them to 4 channel output electrical data.


The central wavelengths of the 4 CWDM channels are 1271, 1291, 1311 and 1331 nm as members of the CWDM wavelength grid defined in ITU-T G694.2. It contains a duplex LC connector for the optical interface and a 148-pin connector for the electrical interface. To minimize the optical dispersion in the long-haul system, single-mode fiber (SMF) has to be applied in this module.

The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference.


Functional Description
This product converts the 4-channel 10Gb/s electrical input data into CWDM optical signals (light), by a driven 4-wavelength Distributed Feedback Laser (DFB) array. The light is combined by the MUX parts as a 40Gb/s data, propagating out of the transmitter module from the SMF. The receiver module accepts the 40Gb/s CWDM optical signals input, and de-multiplexes it into 4 individual 10Gb/s channels with different wavelength. Each wavelength light is collected by a discrete photo diode, and then outputted as electric data after amplified by a TIA. Figure 1 shows the functional block diagram of this product.


A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.


Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. The ModSelL allows the use of this product on a single 2-wire interface bus – individual ModSelL lines must be used.

Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP+ memory map.

The ResetL pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.

Low Power Mode (LPMode) pin is used to set the maximum power consumption for the product in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.

Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a "Low" state.

Interrupt (IntL) is an output pin. "Low" indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.


Optical Characteristics

Parameter

Symbol

Min

Typical

Max

Unit

Notes

Wavelength Assignment

L0

1264.5

1271

1277.5

nm



L1

1284.5

1291

1297.5

nm



L2

1304.5

1311

1317.5

nm



L3

1324.5

1331

1337.5

nm


Transmitter

Side Mode Suppression Ratio

SMSR

30



dB


Total Average Launch Power

PT



8.3

dBm


Average Launch Power, each Lane

PAVG

-7


2.3

dBm


Optical Modulation Amplitude (OMA), each Lane

POMA

-4


3.5

dBm

1

Difference in Launch Power between any Two Lanes (OMA)

Ptx,diff



6.5

dB


Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane

OMA-TDP

-4.8



dBm


TDP, each Lane

TDP



2.6

dB


Extinction Ratio

ER

3.5



dB


Relative Intensity Noise

RIN



-128

dB/Hz

12dB reflection

Optical Return Loss Tolerance

TOL



20

dB


Transmitter Reflectance

RT



-12

dB


Transmitter Eye Mask Definition {X1, X2, X3, Y1, Y2, Y3}


{0.25,0.4,0.45,0.25,0.28,0.4}



Average Launch Power OFF Transmitter, each Lane

Poff



-30

dBm


Receiver

Damage Threshold, each Lane

THd

3.3



dBm

2

Average Power at Receiver Input, each Lane


-13.7


2.3

dBm


Receiver Reflectance

RR



-26

dB


Receive Power (OMA), each Lane




3.5

dBm


Stressed Receiver Sensitivity (OMA), each Lane




-9.6

dBm

3

Receiver Sensitivity (OMA), each Lane

SEN



-11.5

dBm


Difference in Receive Power between any Two Lanes (OMA)

Prx,diff



7.5

dB


LOS Assert

LOSA

-28



dBm


LOS Deassert

LOSD



-15

dBm


LOS Hysteresis

LOSH

0.5



dB


Receiver Electrical 3 dB upper Cutoff Frequency, each Lane

Fc



12.3

GHz


Conditions of Stress Receiver Sensitivity Test (Note 4)

Vertical Eye Closure Penalty, each Lane



1.9


dB


Stressed Eye J2 Jitter, each Lane



0.3


UI


Stressed Eye J9 Jitter, each Lane



0.47


UI



Notes:

1. Even if the TDP < 0.8 dB, the OMA min must exceed the minimum value specified here.
2. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
3. Measured with conformance test signal at receiver input for BER = 1x10-12.
4. Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.

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